Google+ VLSI QnA: Finite State Machine (FSM)

Monday 19 May 2014

Finite State Machine (FSM)

Ways to design clocked sequential circuits : 

  • Mealy Machine 
  • Moore Machine 

Mealy Machine

In a Mealy machine, the outputs are a function of the present state and the value of inputs. Due to this, outputs may change asynchronously with change in inputs.

Output = f(Present State, Input)

Moore Machine

In a Moore machine, the outputs depend only on the present state. In the case of Moore Machine, the next state is calculated using the inputs and the current state. The outputs are computed by a combinatorial logic circuit whose inputs are the state variables.

Output = f(Present State)

Please go through the excitation table for D - flip flop for better understanding.

Q) Design a circuit that detects three consecutive '1's using Mealy and Moore FSM.

Answer)
I) Mealy FSM

Mealy FSM
Mealy FSM


State truth table
State truth table


Y = In.q1
Y = In.q1


Q1 = In.q1 + In.q0
Q1 = In.q1 + In.q0


Q0 = In.not(q1).not(q0)
Q0 = In.not(q1).not(q0)


Mealy FSM circuit implementation
Mealy FSM circuit implementation


II) Moore FSM

Moore FSM
Moore FSM


State truth table
State truth table


Output truth table
Output truth table


Y = q0.q1
Y = q0.q1


Q1 = In.q0 + In.q1
Q1 = In.q0 + In.q1


Q = In.q1 + In.not(q0)
Q0 = In.q1 + In.not(q0)


Moore FSM circuit implementation
Moore FSM circuit implementation

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